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MC10EP35 JK Flip Flop
The MC10EP35 is a higher speed/low voltage version of the EL35 JK flip flop. The J/K data enters the master portion of the flip flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is asynchronous and is activated with a logic HIGH.
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* * * * * * * * * * *
300ps Propagation Delay High Bandwidth to 3 GHz Typical High Bandwidth Output Transistors PECL mode: 3.0V to 5.5V VCC with VEE = 0V ECL mode: 0V VCC with VEE = -3.0V to -5.5V 75kW Internal Input Pulldown Resistors Q Output will default LOW with inputs open or at VEE ESD Protection: >4KV HBM, >200V MM Moisture Sensitivity Level 1, Indefinite Time Out of Drypack. For Additional Information, See Application Note AND8003/D Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34 Transistor Count = 77 devices
8 1 SO-8 D SUFFIX CASE 751
MARKING DIAGRAM
8 HEP35 ALYW 1 *For additional information, see Application Note AND8002/D A L Y W = Assembly Location = Wafer Lot = Year = Work Week
J
1
J
8
VCC
PIN DESCRIPTION
PIN FUNCTION ECL Clock Inputs ECL Signal Inputs ECL Asynchronous Reset ECL Data Outputs CLK J, K
K
2
K Flip Flop
7
Q
RESET
CLK
3
R
6
Q
Q, Q
RESET
4
5
VEE
J L L H H X K L H L H X
TRUTH TABLE
RESET L L L L H CLK Z Z Z Z X Qn+1 Qn L H Qn L
Figure 1. 8-Lead Pinout (Top View) and Logic Diagram
Z = LOW to HIGH Transition
ORDERING INFORMATION
Device MC10EP35D MC10EP35DR2 Package SOIC SOIC Shipping 98 Units/Rail 2500 Tape & Reel
(c) Semiconductor Components Industries, LLC, 1999
1
September, 1999 - Rev. 1.0
Publication Order Number: MC10EP35/D
MC10EP35
MAXIMUM RATINGS*
Symbol VEE VCC VI VI Iout TA Tstg JA JC Tsol Power Supply (VCC = 0V) Power Supply (VEE = 0V) Input Voltage (VCC = 0V, VI not more negative than VEE) Input Voltage (VEE = 0V, VI not more positive than VCC) Output Current Operating Temperature Range Storage Temperature Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Solder Temperature (<2 to 3 Seconds: 245C desired) Still Air 500lfpm Continuous Surge Parameter Value -6.0 to 0 6.0 to 0 -6.0 to 0 6.0 to 0 50 100 -40 to +85 -65 to +150 190 130 41 to 44 5% 265 Unit VDC VDC VDC VDC mA C C C/W C/W C
* Maximum Ratings are those values beyond which damage to the device may occur.
DC CHARACTERISTICS, ECL/LVECL (VCC = 0V; VEE = -5.5V to -3.0V) (Note 3.)
-40C Symbol IEE VOH VOL VIH VIL IIH Characteristic Power Supply Current (Note 1.) Output HIGH Voltage (Note 2.) Output LOW Voltage (Note 2.) Input HIGH Voltage Single Ended Input LOW Voltage Single Ended Input HIGH Current Min 30 -1135 -1935 -1210 -1935 Typ 40 -1060 -1810 Max 50 -885 -1685 -885 -1610 150 Min 30 -1070 -1870 -1145 -1870 25C Typ 40 -945 -1745 Max 50 -820 -1620 -820 -1545 150 Min 30 -1010 -1810 -1085 -1810 85C Typ 40 -885 -1685 Max 50 -760 -1560 -760 -1485 150 Unit mA mV mV mV mV A
IIL Input LOW Current 0.5 0.5 0.5 A NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 1. VCC = 0V, VEE = VEEmin to VEEmax, all other pins floating. 2. All loading with 50 ohms to VCC-2.0 volts. 3. Input and output parameters vary 1:1 with VCC.
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MC10EP35
DC CHARACTERISTICS, LVPECL (VCC = 3.3V 0.3V, VEE = 0V) (Note 6.)
-40C Symbol IEE VOH VOL VIH VIL IIH Characteristic Power Supply Current (Note 4.) Output HIGH Voltage (Note 5.) Output LOW Voltage (Note 5.) Input HIGH Voltage Single Ended Input LOW Voltage Single Ended Input HIGH Current Min 30 2165 1365 2090 1365 Typ 40 2240 1490 Max 50 2415 1615 2415 1690 150 Min 30 2230 1430 2155 1430 25C Typ 40 2355 1555 Max 50 2480 1680 2480 1755 150 Min 30 2290 1490 2215 1490 85C Typ 40 2415 1615 Max 50 2540 1740 2540 1815 150 Unit mA mV mV mV mV A
IIL Input LOW Current 0.5 0.5 0.5 A NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 4. VCC = 3.3V, VEE = 0V, all other pins floating. 5. All loading with 50 ohms to VCC-2.0 volts. 6. Input and output parameters vary 1:1 with VCC.
DC CHARACTERISTICS, PECL (VCC = 5.0V 0.5V, VEE = 0V) (Note 9.)
-40C Symbol IEE VOH VOL VIH VIL IIH Characteristic Power Supply Current (Note 7.) Output HIGH Voltage (Note 8.) Output LOW Voltage (Note 8.) Input HIGH Voltage Single Ended Input LOW Voltage Single Ended Input HIGH Current Min 30 3865 3065 3790 3065 Typ 40 3940 3190 Max 50 4115 3315 4115 3390 150 Min 30 3930 3130 3855 3130 25C Typ 40 4055 3255 Max 50 4180 3380 4180 3455 150 Min 30 3990 3190 3915 3190 85C Typ 40 4115 3315 Max 50 4240 3440 4240 3515 150 Unit mA mV mV mV mV A
IIL Input LOW Current 0.5 0.5 0.5 A NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 7. VCC = 5.0V, VEE = 0V, all other pins floating. 8. All loading with 50 ohms to VCC-2.0 volts. 9. Input and output parameters vary 1:1 with VCC.
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MC10EP35
AC CHARACTERISTICS (VCC = 0V; VEE = -3.0V to -5.5V) or (VCC = 3.0V to 5.5V; VEE = 0V)
-40C Symbol fmax tPLH, tPHL tRR tS tH tSKEW tPW tJITTER Characteristic Maximum Toggle Frequency (Note 10.) Propagation Delay to Output Diff. R, CLK->Q, Q Set/Reset Recovery Setup Time Hold Time Duty Cycle Skew (Note 11.) Skew Part-to-Part Minimum Pulse Width CLK, RESET Cycle-to-Cycle Jitter 150 200 150 Min Typ 3.0 Max Min 25C Typ 3.0 Max Min 85C Typ 3.0 Max Unit GHz ps 300 TBD 0 100 TBD TBD 400 TBD 150 200 450 170 320 TBD 0 100 TBD TBD 400 TBD 150 200 470 180 330 TBD 0 100 TBD TBD 400 TBD ps 480 ps ps ps ps
tr Output Rise/Fall Times ps tf (20% - 80%) Q, Q 50 110 180 60 120 200 70 140 220 10. Fmax guaranteed for functionality only. VOL and VOH levels are guaranteed at DC only. 11. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs.
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MC10EP35
PACKAGE DIMENSIONS
SO-8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751-06 ISSUE T
A
8
D
5
C
E
1 4
H
0.25
M
B
M
h B C e A
SEATING PLANE
X 45 _
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_
q
L 0.10 A1 B 0.25
M
CB
S
A
S
q
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MC10EP35
Notes
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MC10EP35
Notes
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MC10EP35
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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MC10EP35/D

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